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趙佑錫 - The Evolution of AI in Chip Design - 2023 Taiwan AI Academy Conf

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The Evolution of AI in Chip Design

Time / Place:

⏱️ 09/16 (Sat.) 11:00-11:30 at R1 - 1st Conference Room

Abstract:

Generative AI has emerged as an outstanding and versatile solution. Its rapid advancements and deep impacts have exceeded many other technological breakthroughs, delivering substantial benefits to numerous industries. Within the semiconductor industry, generative AI integrated into EDA tools has solidified its position by offering unparalleled optimization capabilities. Indeed, these cutting-edge tools have demonstrated the capacity to change the rules of the game, enabling teams engaged in chip and system development to significantly enhance performance. Furthermore, they play a critical role in boosting engineering productivity and simplifying complex design convergence processes. In this presentation, we will introduce how EDA’s evolution through AI and how to leverage this transformative power into chip design and implementation.

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Biography:

趙佑錫
  • 趙佑錫 Erick Chao
  • Cadence Design Systems / Sr Software Architect
  • With 23 years of extensive experience in IC design, implementation, and EDA development, I have a profound understanding of user requirements and software development in Electronic Design Automation (EDA). My journey in AI/ML began with graduation from the 1st Hsinchu manager class at Taiwan AI Academy (AIA). At the same time, I assumed a role as a ML architect within a top number 1 IC fabless company in Taiwan. Transitioning to Cadence Design Systems, I took the role of leading RD team in both Hsinchu and Shanghai. My perspective is all-encompassing, spanning from that of an adept end-user to that of a contributor to EDA solution development empowered by AI/ML technologies. At present, I am entrusted with the leadership of one of Cerebrus RD teams, a division responsible for the AI-driven production within Cadence Design Systems.

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